Graduate Students

Nikhil Jain
Graduate Students
Email: jain34[at]vt[dot]edu
Education:
B.S., University of Illinois at Urbana Champaign, 2010
Research:
Nikhil is interested in exploring III-V material systems for photovoltaic and sustainable energy applications. His research at ADSEL primarily focuses on heterogeneous integration of III-V multi-junction solar cells on Ge and lattice engineered Si substrates using MBE.
Hobbies: Nikhil enjoys playing cricket/TT and listening to music.

Patrick Goley
Email: patrick[dot]goley[at]vt[dot]edu
Education:
B.S., Electrical Engineering, Virginia Polytechnic Institute and State University, 2013
Research:
Patrick is interested in the study of composite dielectrics on Ge and the integration of III-V multijunction solar cells on Si.
Hobbies: Patrick enjoys cooking with friends and family, hiking, and playing acoustic guitar.

Michael Clavel
Email: mbclavel[at]vt[dot]edu
Education:
B.S., Electrical Engineering, Virginia Polytechnic Institute and State University, 2013
Research:
Michael is interested in the study of novel dielectrics on III-V surfaces and their passivation and self-cleaning effects during growth.
Hobbies: Michael enjoys astronomy, hiking, jogging, and playing electric guitar.

Raghunandan Mohan Rao
Email: raghumr[at]vt[dot]edu
Education:
M. Tech., Laser Technology, Indian Institute of Technology (IIT), Kanpur, India, 2013
B. S., Telecommunication Engineering, R V College of Engineering, Bangalore, India, 2011
Research:
Raghunandan is interested in modelling and the growth of Si-compatible Ge(Sn)/InGaAs tunnel field effect transistors on Si using MBE for ultra-low power logic applications.
Hobbies: Raghu enjoys cooking, biking and listening to music.
Jheng-Sin Liu
Email: jsliu[at]vt[dot]edu
Education:
M.S.,Graduate Institute of Photonics and Optoelectronics,National Taiwan University,Taiwan, 2013
B.S., Electrical Engineering, National Tsing Hua University,Taiwan,2011
Research:
Jheng is interested in modelling and the MBE growth of mixed arsenide/antimonide based tunnel field effect transistors heterogeneously integrated on Si for ultra-low power logic applications.
Hobbies: Jheng enjoys jogging and cooking.
Peter Nguyen
Email: petern[at]vt[dot]edu
Education:
B.S., Electrical Engineering, Virginia Polytechnic Institute and State University, 2014
Research:
Peter is interested modelling and fabrication of Ge based FinFET devices on Si for low-power logic applications.
Hobbies: Peter enjoys weight lifting.



Undergraduate Student
Krishna Neupane
Email: krishna1[at]vt[dot]edu
Education:
B.S., Electrical Engineering, Virginia Polytechnic Institute and State University, 2014
Research:
Krishna is interested in the integration of high-K dielectric oxides on III-V surfaces for low-power applications.
Hobbies: Krishna enjoys playing soccer and swimming.



ADSEL Alumni (Currently Pursuing Higher Studies or Working in Industry)
Yan Zhu
Email: zhuyan[at]vt[dot]edu
Education:
Ph.D., Virginia Tech, April 2014
M.E., Institute of Semiconductors, Chinese Academy of Sciences, China, 2011
B.S., School of Physics, Shandong University, China, 2008
Thesis Title:
"Mixed As/Sb and tensile strained Ge/InGaAs heterostructures for low-power tunnel field effect transistors (TFETs)"

Yan is currently working as a Device Engineer at Toshiba Corporation of America, Livermore, CA.

Siddharth Vijayaraghavan
Email: svijayar[at]vt[dot]edu
Education:
M.Engineering, Virginia Tech, 2012
M.S., University of Houston, 2009
B.E., Anna University, 2006
Project Report:
MBE lab set up, literature review, mask design and TEM sample preparation and imaging.

Siddharth is currently working for Spansion, Austin, Texas.

Bipin Dhavale
Email: bipinpd[at]vt[dot]edu
Education:
M.Engineering, Virginia Tech, 2011
B.E., Visvesvaraya Technological University, 2003

Bipin is currently working for Altera Corporation, San Jose, California.


Patrick Goley
Email: patrick[dot]goley[at]vt[dot]edu
Education:
B. S, Virginia Tech, 2013
UG Honors Thesis:
Electrical Characterization of Oxide-Semiconductor Interfaces.

Patrick is currently working towards his M. S. degree @ADSEL, Virginia Tech. Received NSF Graduate Research Fellowship 2013.

Peter Nguyen
Email: petern[at]vt[dot]edu
Education:
B. S, Virginia Tech, 2014
UG Research:
Interface characterization of high-K dielectrics on InGaAs and Si MOS-C.

Peter is currently working towards his M. S. degree @ADSEL, Virginia Tech. Received NSF Graduate Research Fellowship 2014.

Usman Maqsood
Email:
Education:
B. S, Virginia Tech, 2011
Summer Research:
Contact formation on III-V materials using Physical Vapor Deposition (PVD).

Currently working as a Power Electronics Design Engineer at Boeing, Saint Peters, Missouri.